On track for human brain scale neuromorphic systems with 20 billion neurons and 200 trillion synapses in 2019 or 2020

The work outlined in 2011 is on track to the goals of human brain scale emulation in 2019. In 2015 the goal [stated in 2010] is a chip system simulating 10 billion neurons connected via 1 trillion synapses.
The device must use 1 kilowatt or less (about what a space heater uses) and take up less than 2 liters in volume. 100 of the systems would have 1 trillion neurons and 100 trillion synapses and would be about the complexity of the human brain. In 2014, IBM should have integrated the board with 16 chips into a larger rack with 4 billion neurons using 4 kilowatts of power.
IBM would need another iteration or two of chip design to get to about triple the density with four times lower power usage. The current TrueNorth chip consumes merely 70 milliwatts and is capable of 46 billion synaptic operations per second per watt; literally a synaptic supercomputer in your palm.
In 2011, IBM research suggested that a full-scale model of the human brain, which has 20 billion neurons connected by about 200 trillion synapses, could be reached by 2019, given enough processing power. It would be a hardware model. This does not specify the actual intelligence that would be in the system. It also does not specify the quality of the neurons and synapses that are part of the system.
Still being at human brain scale would be interesting and it would be interesting to see what could be possible and what will be learned. Refinement to better neurons and synapses could progress in the 2020s. The current SyNAPSE-developed chip, which can be tiled to create large arrays, has one million electronic “neurons” and 256 million electronic synapses between neurons. Built on Samsung Foundry’s 28nm process technology, the 5.4 billion transistor chip has one of the highest transistor counts of any chip ever produced.
Each chip consumes less than 100 milliWatts of electrical power during operation. When applied to benchmark tasks of pattern recognition, the new chip achieved two orders of magnitude in energy savings compared to state-of-the-art traditional computing systems.