Engineers build first sub 10 nm carbon nanotube transistor

Engineers have built the first carbon nanotube (CNT) transistor with a channel length below 10 nm, a size that is considered a requirement for computing technology in the next decade. Not only can the tiny transistor sufficiently control current, it does so significantly better than predicted by theory. It even outperforms the best competing silicon transistors at this scale, demonstrating a superior current density at a very low operating voltage.
The engineers, from the IBM T.J. Watson Research Center in Yorktown Heights, New York; ETH Zurich in Zurich, Switzerland; and Purdue University in West Lafayette, Indiana, have published their study on the first sub-10-nm CNT transistor in a recent issue of Nano Letters.
Many research groups are working on reducing the size of transistors in order to meet the requirements of future computing technology for smaller, denser integrated circuits. When today’s transistors (silicon metal-oxide-semiconductor field-effect transistors, or Si MOS-FETs) are shrunk, they lose their ability to effectively control electric current, a problem called short-channel effects. For this reason, researchers have been modifying the Si MOS-FET design in an attempt to make the transistor perform better at sub-10-nm gate lengths, but these devices still face performance challenges.
In the new study, the engineers have discarded silicon altogether and turned to single-walled CNTs. Due to their superior electrical properties and ultrathin (1-2-nm diameter) bodies, CNTs have been proposed as a replacement for silicon for several years. Their ultrathin bodies should allow CNTs to maintain gate control of the current in a transistor even at short channel lengths, potentially enabling them to avoid short-channel effects. The IBM team’s sub-10-nm CNT transistor is the first to demonstrate these advantages.